Fluke MET/CAL Procedure ============================================================================= INSTRUMENT: Fluke 2640A NetDAQ: (1 year) CAL VER RS-232C /5520 INSTRUMENT: Fluke 2641A NetDAQ: (1 year) CAL VER RS-232C /5520 DATE: 21-Oct-97 AUTHOR: Fluke Corporation REVISION: $Revision: 1.1 $ ADJUSTMENT THRESHOLD: 70% NUMBER OF TESTS: 33 NUMBER OF LINES: 259 CONFIGURATION: Fluke 5520A ============================================================================= # # Source: # This procedure is based on the verification procedure in the User's Manual # dated May 1994. # # Compatibility: # 5500/CAL 5.0 or MET/CAL 5.0 or later # # Subprocedures: # None # # Required Files: # ini_val.exe Gets default serial port for UUT from METCAL.INI. # # System Specifications: # TUR calculation is based on specification interval of the accuracy file. # The default 5520A accuracy file contains 90 day specs. # # Fluke makes no warranty, expressed or implied, as to the fitness # or suitability of this procedure in the customer's application. # # The 90 day specifications of the 5520A are used in TUR computations. # STEP FSC RANGE NOMINAL TOLERANCE MOD1 MOD2 3 4 CON 1.001 ASK- R Q N P F W 1.002 HEAD EQUIPMENT SETUP 1.003 DISP [32] WARNING 1.003 DISP HIGH VOLTAGE is used or exposed during the performance 1.003 DISP of this calibration. DEATH ON CONTACT may result if 1.003 DISP personnel fail to observe safety precautions. 1.004 DISP Connect the UUT to an AC power source and turn it on. 1.004 DISP 1.004 DISP Warm-up time: 30 minutes. 1.004 DISP Ambient temperature: 18C - 28C. 1.004 DISP Relative humidity: less than 70%. 1.005 DOS ini_val metcal.ini startup port 1.006 DISP Connect the UUT to [MEM2]. 1.007 DISP To select the proper RS-232C parameters on NetDAQ press 1.007 DISP SHIFT and then COMM (LIST). Use the up and down arrows 1.007 DISP to make each selection and then press ENTER. 1.007 DISP 1.007 DISP [32] 4800 baud 1.007 DISP [32] no PARity 1.007 DISP [32] CTS On 1.007 DISP [32] Echo Off 1.008 HEAD PERFORMING SELF TEST... (~10s) 1.009 PORT [P4800,N,8,1,H][T20000] 1.010 PORT [CLR]*TST?[10][D5000][I] 1.011 MATH MEM1 = MEM 1.012 JMPZ 1.015 1.013 HEAD SELF TEST FAILED: STATUS = [MEM] 1.014 JMP 33.001 1.015 HEAD EQUIPMENT SETUP 1.016 DISP *************************************************** 1.016 DISP 1.016 DISP To reduce noise pickup by test leads, particularly 1.016 DISP during high Ohms verification, use shielded test 1.016 DISP cables between the Fluke 5520A and NetDAQ. 1.016 DISP 1.016 DISP *************************************************** 1.017 DISP Make the following connections to the NetDAQ: 1.017 DISP [32] 5520A NORMAL HI to Input Module CH1 HI 1.017 DISP [32] 5520A NORMAL LO to Input Module CH1 LO 1.018 RSLT = 1.019 RSLT = 1.020 JMP 2.001 1.021 EVAL dummy 2.001 HEAD {DIRECT VOLTAGE PERFORMANCE VERIFICATION} 2.002 PORT *RST;FUNC 1,VDC,1[10] 2.003 5520 0.00mV S 2W 2.004 PORT [CLR]MEAS?[10][I] 2.005 MATH MEM = MEM * 1000 2.006 MEME 2.007 MEMC 300 mV 0.017U 3.001 5520 300.00mV S 2W 3.002 PORT [CLR]MEAS?[10][I] 3.003 MATH MEM = MEM * 1000 3.004 MEME 3.005 MEMC 300 mV 0.056U 4.001 5520 -300.00mV S 2W 4.002 PORT [CLR]MEAS?[10][I] 4.003 MATH MEM = MEM * 1000 4.004 MEME 4.005 MEMC 300 mV 0.056U 5.001 PORT FUNC 1,VDC,2[10] 5.002 5520 0.0000V S 2W 5.003 PORT [CLR]MEAS?[10][I] 5.004 MEME 5.005 MEMC 3 V 0.00015U 6.001 5520 3.0000V S 2W 6.002 PORT [CLR]MEAS?[10][I] 6.003 MEME 6.004 MEMC 3 V 0.00054U 7.001 5520 -3.0000V S 2W 7.002 PORT [CLR]MEAS?[10][I] 7.003 MEME 7.004 MEMC 3 V 0.00054U 8.001 PORT FUNC 1,VDC,3[10] 8.002 5520 0.000V S 2W 8.003 PORT [CLR]MEAS?[10][I] 8.004 MEME 8.005 MEMC 30 V 0.0014U 9.001 5520 30.000V S 2W 9.002 PORT [CLR]MEAS?[10][I] 9.003 MEME 9.004 MEMC 30 V 0.0053U 10.001 5520 -30.000V S 2W 10.002 PORT [CLR]MEAS?[10][I] 10.003 MEME 10.004 MEMC 30 V 0.0053U 11.001 PORT FUNC 1,VDC,4[10] 11.002 5520 0.00V S 2W 11.003 PORT [CLR]MEAS?[10][I] 11.004 MEME 11.005 MEMC 300 V 0.014U 12.001 5520 300.00V S 2W 12.002 PORT [CLR]MEAS?[10][I] 12.003 MEME 12.004 MEMC 300 V 0.053U 13.001 5520 -300.00V S 2W 13.002 PORT [CLR]MEAS?[10][I] 13.003 MEME 13.004 MEMC 300 V 0.04U 14.001 PORT FUNC 1,VDC,5[10] 14.002 5520 0.000mV S 2W 14.003 PORT [CLR]MEAS?[10][I] 14.004 MATH MEM = MEM * 1000 14.005 MEME 14.006 MEMC 90 mV 0.008U 15.001 5520 90.000mV S 2W 15.002 PORT [CLR]MEAS?[10][I] 15.003 MATH MEM = MEM * 1000 15.004 MEME 15.005 MEMC 90 mV 0.02U 16.001 5520 -90.000mV S 2W 16.002 PORT [CLR]MEAS?[10][I] 16.003 MATH MEM = MEM * 1000 16.004 MEME 16.005 MEMC 90 mV 0.02U 17.001 PORT FUNC 1,VDC,6[10] 17.002 5520 750.00mV S 2W 17.003 PORT [CLR]MEAS?[10][I] 17.004 MATH MEM = MEM * 1000 17.005 MEME 17.006 MEMC 750 mV 0.12U 18.001 5520 * S 18.002 RSLT = 18.003 HEAD {ALTERNATING VOLTAGE PERFORMANCE VERIFICATION} 18.004 PORT FUNC 1,VAC,1[10] 18.005 5520 20.00mV 1kH SI S 2W 18.006 PORT [CLR]MEAS?[10][I] 18.007 MATH MEM = MEM * 1000 18.008 MEME 18.009 MEMC 300 mV 0.3U 1kH 19.001 5520 20.00mV 100kH SI S 2W 19.002 PORT [CLR]MEAS?[10][I] 19.003 MATH MEM = MEM * 1000 19.004 MEME 19.005 MEMC 300 mV 1.5U 100kH 20.001 5520 300.00mV 1kH SI S 2W 20.002 PORT [CLR]MEAS?[10][I] 20.003 MATH MEM = MEM * 1000 20.004 MEME 20.005 MEMC 300 mV 1.15U 1kH 21.001 5520 300.00mV 100kH SI S 2W 21.002 PORT [CLR]MEAS?[10][I] 21.003 MATH MEM = MEM * 1000 21.004 MEME 21.005 MEMC 300 mV 15.5U 100kH 22.001 PORT FUNC 1,VAC,2[10] 22.002 5520 3.0000V 1kH SI S 2W 22.003 PORT [CLR]MEAS?[10][I] 22.004 MEME 22.005 MEMC 3 V 0.0115U 1kH 23.001 PORT FUNC 1,VAC,3[10] 23.002 5520 30.000V 1kH SI S 2W 23.003 PORT [CLR]MEAS?[10][I] 23.004 MEME 23.005 MEMC 30 V 0.115U 1kH 24.001 PORT FUNC 1,VAC,4[10] 24.002 5520 300.00V 1kH SI S 2W 24.003 PORT [CLR]MEAS?[10][I] 24.004 MEME 24.005 MEMC 300 V 1.15U 1kH 25.001 5520 * S 25.002 RSLT = 25.003 HEAD {RESISTANCE PERFORMANCE VERIFICATION} 25.004 DISP Make the following connections to the NetDAQ: 25.004 DISP [32] 5520A NORMAL HI to Input Module CH1 HI 25.004 DISP [32] 5520A NORMAL LO to Input Module CH1 LO 25.004 DISP [32] 5520A SENSE HI to Input Module CH11 HI 25.004 DISP [32] 5520A SENSE LO to Input Module CH11 LO 25.005 PORT FUNC 1,OHMS,1,4[10] 25.006 5520 0.00Z S 4W 25.007 PORT [CLR]MEAS?[10][I] 25.008 MEME 25.009 MEMC 300 Z 0.03U 26.001 5520 190.00Z S 4W 26.002 PORT [CLR]MEAS?[10][I] 26.003 MEME 26.004 MEMC 300 Z 0.068U 27.001 PORT FUNC 1,OHMS,2,4[10] 27.002 5520 0.0000kZ S 4W 27.003 PORT [CLR]MEAS?[10][I] 27.004 MATH MEM = MEM / 1000 27.005 MEME 27.006 MEMC 3 kZ 0.0003U 28.001 5520 1.9000kZ S 4W 28.002 PORT [CLR]MEAS?[10][I] 28.003 MATH MEM = MEM / 1000 28.004 MEME 28.005 MEMC 3 kZ 0.00068U 29.001 PORT FUNC 1,OHMS,3,4[10] 29.002 5520 19.000kZ S 4W 29.003 PORT [CLR]MEAS?[10][I] 29.004 MATH MEM = MEM / 1000 29.005 MEME 29.006 MEMC 30 kZ 0.0068U 30.001 5520 * S 30.002 PORT FUNC 1,OHMS,4,4[10] 30.003 DISP Make the following connections to the NetDAQ: 30.003 DISP [32] 5520A NORMAL HI to Input Module CH1 HI 30.003 DISP [32] 5520A NORMAL LO to Input Module CH1 LO 30.003 DISP [32] 5520A NORMAL HI to Input Module CH11 HI 30.003 DISP [32] 5520A NORMAL LO to Input Module CH11 LO 30.004 5520 190.00kZ S 2W 30.005 PORT [CLR][D1000]MEAS?[10][I] 30.006 MATH MEM = MEM / 1000 30.007 MEME 30.008 MEMC 300 kZ 0.068U 31.001 PORT FUNC 1,OHMS,5,4[10] 31.002 5520 1.9000MZ S 2W 31.003 PORT [CLR][D1000]MEAS?[10][I] 31.004 MATH MEM = MEM / 1000000 31.005 MEME 31.006 MEMC 3 MZ 0.000410U 32.001 5520 * S 32.002 RSLT = 32.003 HEAD {FREQUENCY PERFORMANCE VERIFICATION} 32.004 DISP Remove the sense leads. 32.005 PORT FUNC 1,FREQ,3[10] 32.006 5520 10.000kH 1.0V SI S 2W 32.007 PORT [CLR]MEAS?[10][I] 32.008 MATH MEM = MEM / 1000 32.009 MEME 32.010 MEMC 90 kH 0.006U 33.001 END